Well... I had a go at using the EAGLE v7 hierarchical design feature.
As matters currently stand, it falls considerably short of being useful.
Yes, it's a handy way of organizing the schematic, and handling replicated structures (I need to deal with eight copies of one module, each of which has four copies of a sub-module).
But....
It doesn't help the least friggin' bit with replicated layout. I'm thinking it actually makes the layout process even more awkward.
The resulting reference designators are appalling (QUAD2:CELL1:R34, for example). They can't be re-sequenced into geographical order, but I guess that's OK, because there's no way they could be included on the silkscreen, and putting them on an assembly drawing would require some serious miniaturization.
Trying to debug a board...? This could get very annoying, very fast.
Then there's the question of whether the assembly house will accept that refdes format. And whether the BOM and pick-and-place export utilities I've been using will deal with it... or indeed with a hierarchical design.
Also, there doesn't appear to be any way of selecting a hierarchy object per se, so that its components can be moved apart from the mass and onto a layout template. Highlighting in the schematic and alt-tabbing (the switch view button would remove the highlight!) to the layout gets a somewhat useful indication of what's what, but the moment you select the move tool, the highlight goes bye-bye.
So, nope. Not useful for what I'm trying to accomplish. Back to the old flat schematic, with eight copies of probably a B-size sheet with a complete four-cell cluster plus the common stuff. That'll be enough of a headache, but at least the reference designators will be a sane length.
This also means that the next phase of the project will be more laborious than I'd hoped, but, hey, it's hourly.
(Maybe I'll rummage around the 'net a bit later, and see if there are any useful tips for actually using the hierarchical features. Should I find anything to change my mind, I'll post an update here.)
Update: Seems the hierarchical thing was half-implemented, not to the point of actual usability, at the time Cadsoft was acquired by its previous corporate overlords, but Marketing decided to declare it a feature anyway. I did, however, find a useful tip on how to do what I actually need to do: lay out the cell as a separate design, then import it into the overall design 32 times.
Know what'd really be helpful here? The ability to select a group in the layout editor, and lock all the elements in it together until further notice. That way, each cell layout could be moved around as a unit. This would be especially useful if the lock persisted when the cell design was imported into the greater design.
Update 2: I promptly find two annoyances with the "save cell as its own design, then import repeatedly" approach.
First, there doesn't seem to be a way to auto-sequence a selection of nets, so that, e.g., IN, CONTROL, and OUT would have "1" appended on first importation, "2" on the second, and so on. There's the opportunity to rename nets during importation, but it's annoyingly manual.
Second, each imported design starts on a brand-new schematic sheet, which, when we're importing little cells, brings us back to the classic annoyance of trying to move schematic fragments from one sheet to another, so we don't wind up with a 50-page schematic.
I have the feeling I'll end up importing four cells, merging the schematics into one B-sized sheet, combining the layouts into a quad-cell, grafting in the per-quad circuitry, then importing the quad eight times into the overall design.
I'm also getting the feeling that this may end up being a six-layer design. I'd better get a handle on how much space I really have for the stuff that goes between the cells, to see if I can loosen things up a bit and get back to four layers.
...Oh. I'd made the cell layout 0.4" wide, because it uses 4 pins on a 0.1" pitch stacking header. But the actual pitch required is closer to 1". [Edit: Sorry; the final connector row is on 1" pitch, but there are two staggered rows, so the cells are on 0.5" pitch, overall. Still works with all the cells being on the same side of the board.] That do free up some space; I can maybe use a single-row stacking header, and putting all the cells on one side of the board might make life easier. Or, I can get away with using a components-both-sides layout for each cell. Anyway, it should be easy, but I need to get my strategy in order first.
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