There was an occasional glitch.
Turned out to involve the logic resetting itself after a wedgie.
The wedgie, after considerable poking & prodding, turned out to be a race condition in a state machine, which resulted, sometimes, in one important variable getting set while another wasn't. This was fallout from a clocking change.
It looks like synchronizing a couple of inputs may have solved the problem. I'm running a wedgie test now, and haven't seen any adverse results in a couple of hours. I'll leave it running overnight before declaring it good and cleaning up the test scaffolding.
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