Still a-pokin' at that electrical apparatus with the KV30 in it. (No, it doesn't operate at 30KV. Different project entirely.)
The analog aspects show definite signs of suboptimality, so naturally I start looking more closely at the power supplies. Well, the 3.3V power supply, since that's the one that counts.
This dingus runs off an inconveniently high input voltage (though well in SELV territory; it's merely out of bounds for my usual favorite regulators). I'm using a switcher to get down to 5V, and a little teeny linear to get from 5V to 3.3V.
First thing I check, during bring-up: do I get 5V? Yes, and well within tolerance.
Next I install the ferrite bead that connects the output of the 5V regulator to the input of the 3.3V regulator, and check again: 3.3V right around nominal, and 5V still healthy. All this according to the nice accurate bench multimeter.
But, once I start using the ADC, I see unstable measurements. Since the 3.3V supply is the ADC reference (I have a plan for compensating for supply tolerance, but that comes later, and it can't deal with instability), I stick a scope on the 3.3V supply.
Oh, looky! A sort of repetitive double-pulse spike, around 100mV peak to peak. That'll make a right hash of things.
There's... something kind of similar on 5V. But much less spiky.
Awright. Replace that bead with a real inductor. Increase capacitor values.
Now the 5V supply is dang near clean. But the 3.3V is as spiky as ever. And it does seem to be synchronized to the 5V switcher.
Tossing a 50mA static load on the 5V rail gets a tidy 1.5MHz ripple on the 3.3V supply, while the 5V looks clean.
The linear regulator is amplifying the noise?
Let's have another look at the layout, shall we?
When I did the layout for the development board, I went with a 2-layer stackup in the interest of getting the boards quick & cheap so's I'd have something to play with. I also got a little casual with the layout of the linear regulator and its capacitors, and then didn't give it a critical going-over after the autorouter had run traces through that area.
There's a slot in the solder-side (where those two caps live) ground fill, nigh a quarter of an inch long. The output cap is connected to the plane right near the ground via for the regulator chip: no problem. The input cap, though, connects right in the middle of the other side of the slot, close to the switcher's noise.
So... maybe rotating the input cap so it shares the output cap's ground connection (close to the chip) will correct the problem?
Nope. Still all quiet on the 5V front, and 100mV of switching-correlated noise on the 3.3V.
Well, that layout issue didn't make a whole lot of sense at 1.5MHz anyway. At 150MHz, maybe, but I'm not dealing with that here.
Back to pondering.
Update: What the...? Ripple at the linear reg output cap is lower by almost an order of magnitude.
Um. One side of the 3.3V trace runs alarmingly close to the switcher's inductor on its way around the end of the board to its destination. (Another, autorouted trace is even closer.) Aaaand... yeh. Horrid noise on that end of the trace. Which is the end that connects to everything important.
Guess the next thing to try is changing a few of the bypass caps along that path to something stiffer. Or, perhaps, cutting the trace and running a patch wire 1/8" south. Ugh. Cut & patch is annoying, but I think it's the best next step, really. And at least the trace is a generous 0.010" wide, not a scrawny 0.006".
Update 2: Rerouting the trace and adding a bonus microFarad downstream each reduced the noise by about a factor of 2, so now it's down around 25mV. I expect the power to be a fair bit cleaner on the 4-layer life-size board... and there'll certainly be a respin in any case, as the final form factor has yet to be determined, never mind the type of connectors on the ends of the board.
ADC performance now seems consistent with a moderately noisy power supply. I may add an extra stage of filtering on VDDA in the next iteration, in addition to general cleaning up.
Meanwhile, I can get back to working on the firmware. Maybe I should first populate one of the piggyback boards, so I can test some real-world I/O functions.