Over at Toasterco, my understudy had been struggling for a couple of weeks with a manufacturing problem; a batch of controller boards (the crazy complicated, do-everything model with zillions of little SMT components) made by a new contract manufacturer had a high failure rate, and the failure mode made no sense.
Basically, all signs pointed to the I2C bus being wedged LOW (both signals). This led to various trouble.
So, I spent a couple of hours over there - hey, their lab is air conditioned! Things continued not making sense. The SDA and SCL lines were clearly being actively driven low, showing about 0.25V with the normal 10K pullups to 3.3V, and maybe 1.2V with a 330 Ohm pullup. But then....
The I2C bus has a level translator between 3.3V (the MCU and a few other things) and 5V (a parallel port that really does need to run on 5V). Were I designing the thing today, that wouldn't be necessary, as there are now 16-bit I2C I/O port chips with split supplies, so the bus can run on one voltage and the I/O on another. But that's now, and the board was designed then, and it needed the bus bridge.
On the 5V side, there are two pullup resistors, as one might expect. But. Wait. Er...
Know what you get when you place a pair of 0402 resistors next to each other on a 25 mil grid? Right! It's kind of hard to tell which pads are what. And the 0402 resistor footprint in my library at the time had "part goes this way" markings in the assembly drawing, but not on the silkscreen.
So, yeah. The resistor pair was rotated 90° from its correct orientation. One resistor was between SDA and SCL, while the other was between 5V and 5V. Result: SDA and SCL on the 5V side drifted LOW by default, causing the translator chip to drive them low on the 3.3V side.