Diodes. Why'd it have to be diodes?

Let's see... I've had issues with reverse current (and its change with temperature) a few times.  Forward voltage, once in a while.  The diode property of the day is...

Junction capacitance!

Perfectly straightforward circuit.  Gate of FET has a weak pulldown to handle startup conditions.  Logic can drive gate HIGH or LOW via a 10K resistor (a value that can't be much reduced due to constraints elsewhere in the circuit).  A pair of global enable signals, when in the LOW-to-disable state, pull the gate LOW through Schottky diodes of a familiar type.  So, the global enables and the logic all have to agree that the FET should be turned on before it gets voltage (in excess of a Schottky drop @ low current) applied to the gate.

All seemed well, until, in checking out a reported timing issue on the tens-of-milliseconds scale, I observed that there was a microsecond-scale ACTIVE pulse on the output of the FET when the enables went HIGH, but before the logic had gotten around to taking action.

Oog.  Edge getting coupled backward through the diodes?  Edge getting coupled backward through the diodes.  Capacitively.  Turns out those suckers have 60 pF typical junction capacitance, each.

Tossing in a 470 pF cap from gate to ground suppresses the pulse, without obvious untoward effects.

A possibly better solution is to swap the diodes for a footprint-compatible model of adequate specs for the application and 2 pF maximum junction capacitance @ 0V.

 

Comments

[Marcus Erroneous]

Hmmm, so is it cheaper by component to add the cap or add the lower capacitive diode? The flip side to this being how does each choice affect the circuit board construction cost? Fascinating. Glad I kept coming back to check.

I'm a Lexican and followed you over from one of the others, post-Lex. I'm a ham, so this stuff is one of my hobbies.

Nice place.

mark

[Eric Wilner]

Given that it's a fairly low-volume board that goes in an expensive product, I'm not really worried about the cost difference. Best guess is that the cap, even with assembly, is a bit cheaper.
In this specific case, the deciding factor is whether or not the client's engineering department has nailed down the final layout for the board yet - I'm testing a preliminary version, and the production layout was supposed to have been done some months ago, but sundry issues have held up both testing and the production design.
If there's still time to make design tweaks, I think we include the cap footprint and then check with the supply-chain folks about making the diode change.
The least-trouble option is just to ignore the issue, which we may be able to get away with; this affects two signals, and it's not clear whether either of the recipients will even notice a microsecond pulse, let alone do anything dangerous.

[Marcus Erroneous]

Eric,

Thank you for your answer and thank you for posting stuff like this. I'll be back. (promise, not a threat)

mark