One panic I had over the weekend came when I first attempted to configure the FPGA.
I'd generated the .bit file using ISE 11.1 on the Linux box, then fired up iMPACT 11.1 on the Windows machine in the lab. I'd already confirmed that initializing the JTAG scan chain found one each XC3S500E, and figured the chip must be alive.
However... when I got the .bit file ready, and actually clicked Program, I got the pop-up progress window... and a complete hang. No progress, and no useful diagnostic output.
After searching for various combinations of keywords and finding nothing that explained iMPACT hanging when trying to program a device, I resorted to comparing my schematic to that of a simple eval board... and, almost immediately, realized that the PROG pin was being driven LOW by the processor (which was running an adaptation of an old test program, which still thought that the pin driving PROG was an active-high enable to an LCD panel, and was setting it "inactive" by default).
So: if your attempt to program a Xilinx FPGA via JTAG is hanging uninformatively, check the PROG line.